Ikalogic SP209i (Industry Version) Logic Analyzer

SP209 series logic analyzers and protocol decoders provide detailed analysis of logic signals and protocols.


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Product number: SP209i
Manufacturer: Ikalogic


Designed for performance, the SP Series logic analyzers offer the ability to capture and analyze 9 channels of logic signals and industrial buses at a frequency of 200MHz. This is perfect for demanding applications where logic signals need to be captured with maximum resolution on all channels.

The SP209 logic analyzers rely on ScanaStudio software (Windows, Mac, Linux) to acquire, display, analyze and decode signals. Most industry standard protocols can be interpreted including: SPI, I2C, USART, 1-wire, CAN, LIN, I2C, RS232, RS485, TWI and many more. More than 30 protocols are available.

SP209 series logic analyzers and protocol decoders provide detailed analysis of logic signals and protocols with 200 MHz (5 ns) timing resolution. 9-channel operation allows 8-bit parallel data to be captured along with a clock or strobe signal. The SP series consists of two devices, SP209 and SP209i.


  • 9 logical channels with adjustable thresholds (1.8V, 2.5V, 3.3V, 5V)
  • State-of-the-art input stage with Schmitt triggers that eliminate glitches on slow signals
  • 200MHz sampling rate, with all 9 channels used
  • Option for external clock (state mode) up to 50 MHz
  • Accurate trigger-in and trigger-out signals on SMA ports
  • Sample compression and streaming via USB.
  • 2GB DDR-3 memory starts when USB is not fast enough
  • Built-in receivers in industrial version: SP209i (RS232, CAN, LIN, RS485)

Industrial version

Logic channels can be multiplexed with dedicated industrial inputs that connect directly to RS232, RS485, CAN and LIN buses.


Embedded 2GB sampling memory

The built-in embedded 2GB sampling memory always guarantees high computing power. SP Series logic analyzers compress and stream captured signals to a Windows, Linux, or MacOS PC via USB 2.0. USB bandwidth can vary from system to system and is practically limited to 20 MB/s. That's why SP logic analyzers have onboard 2Gb DDR-3 memory that caches the acquired samples at 1.6GB/s, bypassing USB limitations.


Powerful trigger options

  • Edge trigger
  • Logic change on one or more channels
  • Trigger on a sequence of timed logic signals
  • Trigger on a protocol word or event (e.g. serial word or I2C address acknowledgment)
  • External trigger input
  • External trigger output
  • Multi-stage trigger system
  • Two-stage trigger (e.g. first edge trigger, then trigger on I2C address)