Exerciser & Analyzer for Memory Protocols
Product Nr.: PGY-SSMlite-eMMC
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Features eMMC Protocol Analyzer
- Continuous monitoring of protocol data for a long time to capture elusive events (more than 30GB data capture)
- Analysis of captured data per standards for protocol integrity, count of data bursts, CMD CRC errors, Response CRC errors, Data CRC errors, Timing Values, and Reserved commands
- Hardware-based protocol-aware trigger capability in real-time enables capturing specific Events. Triggering facility on patterns, commands, or error events.
- Users can identify the anomalies by decoding command and response arguments.
- Analytics feature provides analysis of acquired protocol data by plotting command, response, data, and frequency of operation over acquired time.
- The analytics feature also provides the decoding of device registers for easy analysis.
- Filters allow you to view specific packets in decoded protocol packets.
- Search feature for specific events in protocol activity.
- Easy-to-use user interfaces save time on the learning curve.
- Handles long-duration capture and displays the decoded data without demanding extensive resources in the host computer.
- Inserting markers [using Trigger-In] in protocol activity helps in correlating the input digital signal with Protocol Activity.
- Trigger-out signal for any specific protocol event allows triggering of other instruments such as an oscilloscope.
- Interface to host system [running UI] using USB3.0 or Gigabit Ethernet interface.
- Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of the firmware.
- Export of Decoded data packets to txt file for further analysis.
Price on request
Product Nr.: PGY-UFS3.1-PA
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Features UFS 3.1 Protocol Analyzer
- Supports version MPHY 4.0, UniPro 1.8, and UFS version 2.1/3.1
- Supports PWM G1 to G7 and HS G1,2,3,4 A and B Series · Supports one/two data lanes (2 TX and 2 RX)
- Flexibility to capture very large data using continuous streaming of Protocol data to host computer
- Hardware-based circular buffer
- Flexibility to decode selected data from 8GB Buffer
- Solder down active probe provides high signal fidelity
- Decoding at MPHY, UniPro, and UFS layer
- Trigger-based on MPHY, UniPro, UFS layer packet content
- Supports triggering in PWM and HS data rate speeds
- Trigger out a signal at the trigger event allows the triggering of other instruments such as oscilloscope
- Interface to host system using USB 3.0 or Gigabit Ethernet Interface
- Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of FPGA firmware
- Decoded data packets can be exported to a text file for further analysis
- PGY-UFS 3.0-PA Protocol Analyzer is lightweight and can be deployed for on-site/ field tests
Price on request
Product Nr.: PGY-UFS4.0-PA
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Features UFS 4.0 Protocol Analyzer
- Supports version MPHY 5.0, UniPro 2.0, and UFS v2.1/3.1/4.0
- Supports PWM G1 to G7 and HS G1, 2, 3, 4, 5 Rate A and B Series
- Supports one/two data lanes (2 TX and 2 RX)
- Flexibility to capture very large data using continuous streaming of Protocol data to host computer with 16GB Internal acquisition memory field upgradeable up to 64GB.
- Hardware-based resizable circular buffer with pre/post-trigger.
- Flexibility to decode selected data from a 16GB buffer.
- Solder down active probe provides high signal fidelity.
- Decoding at MPHY, UniPro, and UFS layers.
- Trigger-based on MPHY, UniPro, and UFS layers packet content.
- Trigger out a signal at the trigger event allows the triggering of other instruments such as an oscilloscope.
- Interface to host system using USB 3.0.
- Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of FPGA firmware.
- Decoded data packets can be exported to a text file for further analysis.
- Lightweight and can be deployed for on-site/ field tests.
Price on request
Product Nr.: PGY-QSPI-EX-PD
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Features QSPI Protocol Exerciser and Analyzer
- Supports QSPI speeds of up to 80MHz*
- Ability to configure it as Master or Slave
- Simultaneously generate QSPI traffic and Protocol decode of the Bus
- QSPI Master and Slaves
- STR and DTR Transfer rates
- Extended, Dual, and Quad QSPI Modes Supported
- Variable QSPI data speeds and duty cycle
- Continuous streaming of protocol data to the host computer to provide a large buffer in sniffer mode
- The timing diagram of the protocol decoded bus
- Listing view of Protocol activity
- Error Analysis in Protocol Decode
- Ability to write exerciser script to combine multiple data frame generation at different data speeds
- USB 2.0/3.0 host computer interface
- API support for automation in Python or C++
Price on request
Product Nr.: PGY-SSMlite-SD
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Features SD Protocol Analyzer
- Continuous monitoring of protocol data for a long time to capture elusive events (more than 30GB data capture)
- Analysis of captured data per standards for protocol integrity, count of data bursts, CMD CRC errors, Response CRC errors, Data CRC errors, Timing Values, and Reserved commands
- Hardware-based protocol-aware trigger capability in real-time enables capturing specific Events. Triggering facility on patterns, commands, or error events.
- Users can identify the anomalies by decoding command and response arguments.
- Analytics feature provides analysis of acquired protocol data by plotting command, response, data, and frequency of operation over acquired time.
- The analytics feature also provides the decoding of device registers for easy analysis.
- Filters allow you to view specific packets in decoded protocol packets.
- Search feature for specific events in protocol activity.
- Easy-to-use user interfaces save time on the learning curve.
- Handles long-duration capture and displays the decoded data without demanding extensive resources in the host computer.
- Inserting markers [using Trigger-In] in protocol activity helps in correlating the input digital signal with Protocol Activity.
- Trigger-out signal for any specific protocol event allows triggering of other instruments such as an oscilloscope.
- Interface to host system [running UI] using USB3.0 or Gigabit Ethernet interface.
- Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of the firmware.
- Export of Decoded data packets to txt file for further analysis.
Price on request
Product Nr.: PGY-SSM
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Features SD/SDIO/eMMC Protocol Analyzer
- Continuous monitoring of protocol data for a long time to capture elusive events (more than 30GB data capture)
- Analysis of captured data per standards for protocol integrity, count of data bursts, CMD CRC errors, Response CRC errors, Data CRC errors, Timing Values, and Reserved commands
- Hardware-based protocol-aware trigger capability in real-time enables capturing specific Events. Triggering facility on patterns, commands, or error events.
- Users can identify the anomalies by decoding command and response arguments.
- Analytics feature provides analysis of acquired protocol data by plotting command, response, data, and frequency of operation over acquired time.
- The analytics feature also provides the decoding of device registers for easy analysis.
- Filters allow you to view specific packets in decoded protocol packets.
- Search feature for specific events in protocol activity.
- Easy-to-use user interfaces save time on the learning curve.
- Handles long-duration capture and displays the decoded data without demanding extensive resources in the host computer.
- Inserting markers [using Trigger-In] in protocol activity helps in correlating the input digital signal with Protocol Activity.
- Trigger-out signal for any specific protocol event allows triggering of other instruments such as an oscilloscope.
- Interface to host system [running UI] using USB3.0 or Gigabit Ethernet interface.
- Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of the firmware.
- Export of Decoded data packets to txt file for further analysis.
Price on request
Product Nr.: PGY-SSMlite-SDIO
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Features SDIO Protocol Analyzer
- Continuous monitoring of protocol data for a long time to capture elusive events (more than 30GB data capture)
- Analysis of captured data per standards for protocol integrity, count of data bursts, CMD CRC errors, Response CRC errors, Data CRC errors, Timing Values, and Reserved commands
- Hardware-based protocol-aware trigger capability in real-time enables capturing specific Events. Triggering facility on patterns, commands, or error events.
- Users can identify the anomalies by decoding command and response arguments.
- Analytics feature provides analysis of acquired protocol data by plotting command, response, data, and frequency of operation over acquired time.
- The analytics feature also provides the decoding of device registers for easy analysis.
- Filters allow you to view specific packets in decoded protocol packets.
- Search feature for specific events in protocol activity.
- Easy-to-use user interfaces save time on the learning curve.
- Handles long-duration capture and displays the decoded data without demanding extensive resources in the host computer.
- Inserting markers [using Trigger-In] in protocol activity helps in correlating the input digital signal with Protocol Activity.
- Trigger-out signal for any specific protocol event allows triggering of other instruments such as an oscilloscope.
- Interface to host system [running UI] using USB3.0 or Gigabit Ethernet interface.
- Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of the firmware.
- Export of Decoded data packets to txt file for further analysis.
Price on request