Storage Bus Host Adapter

Product Nr.: PGY-JTAG-EX-PD

Test your JTAG designs and configure master/slave, generate JTAG traffic and decode the JTAG protocol.

Supports JTAG frequencies of up to 25MH
Simultaneously generate JTAG traffic and Protocol decode of the Bus
JTAG Master Capability
Variable JTAG Data speeds and Duty cycle
User-defined TCK & TDI Delays
Continuous streaming of protocol data to the host computer to provide a large buffer
A timing diagram of Protocol decoded bus
Listing view of Protocol activity
Error Analysis in Protocol Decode
Ability to write exerciser script to combine multiple data frame generation at different data speeds
USB 2.0/3.0 host computer interface
API support for automation in Python or C++

Price on request

Product Nr.: PGY-QSPI-EX-PD

Test your QSPI designs effectively! Configure master/slave, generate QSPI traffic and decode the QSPI protocol.

Supports QSPI speeds of up to 80MHz*
Ability to configure it as Master or Slave
Simultaneously generate QSPI traffic and Protocol decode of the Bus
QSPI Master and Slaves
STR and DTR Transfer rates
Extended, Dual, and Quad QSPI Modes Supported
Variable QSPI data speeds and duty cycle
Continuous streaming of protocol data to the host computer to provide a large buffer in sniffer mode
The timing diagram of the protocol decoded bus
Listing view of Protocol activity
Error Analysis in Protocol Decode
Ability to write exerciser script to combine multiple data frame generation at different data speeds
USB 2.0/3.0 host computer interface
API support for automation in Python or C++

Price on request