Acute LA4068E Logic Analyser

The LA4068E protocol & logic analyser was developed for multi-pin IC applications and has 80 channels.

€8,400.00*

Volume discounts on request!

incl. VAT. (inactive)

Prices excl. VAT plus shipping costs

Delivery time: 1-2 weeks

Further information

Product number: LA4068E

Manufacturer: Acute

LA4068E Logic Analyser

Offer

Description

The Acute LA4000 series of logic analysers are USB3.0 PC-based protocol and logic analysers in one device. The protocol analyser mode offers real-time display. The LA4000 series is designed primarily for use with multi-pin IC design market such as FPGA, LCD drivers, etc. The devices support more than 80 protocols and are equipped with 36 GB RAM. Depending on the model, 68 or 136 channels are available per module, which can be expanded to over 1000 channels if required. The combination of 4 GHz sampling rate, 400 MHz state analysis and the large analysis memory of 32 GB offers development engineers a professional tool for debugging FPGAs and other semiconductors. The LA4000 series can be connected as an MSO via the trigger line with almost all well-known DSOs and is equipped with active probes.

Features

PC-based, 68/136 channels
USB 3.0 interface, 12 V power supply unit
4 GHz timing analysis / 400 MHz state analysis
32 GB RAM
Active probes
Real-time protocol analysis
Options for saving log data to internal SSD
Logic, status and protocol triggers
Stackable with a DSO to form an MSO
Bus decoding & trigger (depending on model): CAN 2.0B/CAN-FD, DP_Aux, eMMC 5.1, I²C, MIPI I3C 1.1, Profibus, SD 3.0, SPI, SVID, SWD, UART (RS232), USB1.1, USB PD 3.0... 100+

Open protocol interface

If the desired protocol is not included in the more than 80 protocol interpreters, or if there is a need to integrate a customised protocol, then the TravelLogic's open protocol interface is a helpful feature. To implement your own decoding function, simply write a Dynamic Link Library (DLL) and insert it into the plug-in folder of the TravelLogic installation directory. The structure of the DLL describes the LA Open Decode Interface.

Parallel Clause Trigger

The "Parallel Clause Trigger" function is available for parallel bus analysis. This allows 16 parallel "IF clause" settings to be set for up to 128 channel value comparisons combined with AND/OR logic conditions and 4 timer/counter conditions. Several protocols can then be logged and analysed simultaneously.